1. Field of the Invention
The present invention relates to the data input/output processing technology for data input/output control with a host processing device. The present invention is designed to reduce a load on the host processing device in a data processing system requiring high-speed input/output control over 1 Gbps. The present invention can be applied in the field of a PC cluster, a storage system, an enterprise server and so on.
2. Description of the Related Art
When an input/output process of data, etc. is performed between a host processing device (hereinafter referred to simply as a host) and a data input/output device (hereinafter referred to simply as an input/output device), the input/output device normally performs a data input/output process without considering the status of the process of the host, the status of the host such as the utilization factor of the CPU, etc. For example, although the utilization factor of the CPU of the host is very high when an input/output process is performed, the input/output device performs a data input/output process and an interrupt process with the host.
Additionally, the input/output device does not consider the relationship between an input/output process and a given process. Therefore, even when there are plural input/output processes for transferring processes having different priorities, every input/output process is equally handled. Furthermore, the input/output process is performed regardless of the status of a process corresponding to the input/output process. Therefore, a notification of an input/output process having a low emergency level is transmitted to the host in an interrupt process.
However, with an increasing number of stages of pipelines for use in a recent high-speed clock of the CPU, the cost of the interrupt process in the host has increased. Especially, with improved performance of the input/output device, the number of occurrences of the interrupt process increases, thereby also increasing the influence of the interrupt process on the entire performance of the host.
In the above-mentioned situation, the interrupt coalescing technique is used to reduce the number of occurrences of the interrupt process. The interrupt coalescing technique collectively performs the interrupt process on plural input/output requests. For example, the number of occurrences of the interrupt process is decreased by performing one interrupt process for n times of input/output process. Otherwise, the number of occurrences of the interrupt process can be decreased by suppressing the occurrences of the interrupt process for a predetermined time period after an occurrence of an input/output request, and performing one interrupt process with the interrupts for the input/output processes which occur during the time period grouped as one interrupt.
Another method is executed as a masking process on an interrupt on the host side. For example, when the utilization factor of the CPU is a predetermined value or more, the host masks the interrupt, thus improving the performance of the CPU.
As a method of approximating the interrupt coalescing technique, there is also a method of reducing the overhead of the interrupt process by collectively transmitting a notification of events or messages. For example, refer to the patent document 1 (Japanese Patent Laid-open Publication No. 2002-342093).
It has become important to efficiently use a high-speed network over 1 Gbps that has been introduced lately. Especially, with an increasing speed of a network, a protocol process, a copying process, an interrupt process, and the like have become widespread. In this situation, since the load on the host has considerably increased, there is a request to reduce the load on the host.
However, in the related art, the input/output device has performed the input/output process without considering the status of the host. For example, although the utilization factor of the CPU is almost 100%, a number of interrupt processes have been performed, or although there is no merit of immediately performing the input/output process, the input/output process has been performed. Thus, the performance of the host is degraded by a disturbance from the data input/output device.
When the number of occurrences of the interrupt process is reduced as in the above-mentioned interrupt coalescing technique for reducing the load on the host, there occurs the problem of a prolonged delayed time in the input/output process. Additionally, since the emergency level of the input/output process is not considered in the interrupt coalescing technique, there also occurs the problem that the input/output process is eventually inefficient.
Furthermore, since the process of masking an interrupt in the host normally issues a notification to a controller, it imposes a high load on the host, and is not an effective method for reducing the cost for the host. In the interrupt masking process, a masking process is performed on an interrupt even in a high-priority process. Therefore, there occurs the problem that the response characteristic of a high-priority process is degraded.
The object of the present invention is to provide a data input/output device capable of suppressing the increase of the process load on the host by an occurrence of an interrupt process accompanying an input/output process, and efficiently performing a data input/output process for the host without degrading the response characteristic of the input/output process.